Throughout the past 30 years, the concept of the perfect stackup has changed considerably. This is especially true in more recent years, where engineers and designers have had the opportunity to use simulation tools that act as another pair of eyes when it comes to understanding the intricacies of the effects of transmission lines on multilayer PCBs.
In previous articles, I have discussed the selection of reference planes and routing pairs, why high-speed signals should be embedded between the planes and methods of reducing EMI. However, if we fail to get the substrate correct, then all of the above techniques are worthless. Planning the multilayer stackup configuration is one of the most important aspects in achieving the best possible performance of a product, yet it is something that few of us do (or should I say, do well).
A poorly designed substrate, with inappropriately selected materials, can degrade the electrical performance of signal transmission, increasing emissions and crosstalk, and it can make the product more susceptible to external noise. These issues can cause intermittent operation due to timing glitches and interference, dramatically reducing the products performance and long-term reliability.
In contrast, a properly built PCB substrate can effectively reduce electromagnetic emissions, crosstalk and improve the signal integrity, providing a low-inductance power distribution network (PDN). Additionally, from a fabrication point of view, it can also improve the manufacturability of the product and reduce costs.
Suppressing the noise at the source rather than trying to elevate the problems once the product has been built makes sense. Having the project completed “Right the First Time,” on time and to budget means that you cut costs by reducing the design cycle, having a shorter time to market and an extended product life cycle.
Interplane Capacitance
A good place to start is with the PDN. More importantly, how we can provide a low-inductance PDN and thus reduce the high-frequency noise?
Decoupling capacitors (Dcaps) supply instantaneous current (at different frequencies) to the drivers until the power supply can respond. In other words, it takes a finite time for current to flow from the power supply circuit (whether on-board or remote) due to the inductance of the trace and/or leads to the drivers.
Every decoupling capacitor has a finite series inductance, which causes its impedance to increase at high frequencies. In order to reduce this inductance as much as possible, a number of small-value Dcaps should be placed in parallel as close as possible to each power pin using a thick, short trace. This is not always possible as circuit density increases with the use of fine-pitch BGAs, so an alternative option is to take advantage of interplane capacitance to distribute capacitance across the board. This is not to say that the Dcaps aren’t required: Every little bit counts.
This column originally appeared in the November 2011 issue of The PCB Magazine.